
Sonoma (MAXREFDES14#) LX9 MicroBoard Quick Start Guide
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3. Included Files
The top level of the hardware design is a Xilinx ISE Project Navigator Project (.XISE) for
Xilinx ISE version 13.4. The Verilog-based HDL design instantiates the MicroBlaze core,
the support hardware required to run the MicroBlaze, and the peripherals that interface
to the Pmod ports. This is supplied as a Xilinx software development kit (SDK) project
which includes a demonstration software application to evaluate the Sonoma subsystem
reference design. The lower level c-code driver routines are portable to the user’s own
software project.
Processor
Microblaze
(Spartan)
Pmod Port Driver
Pmod
Connector
J5
JTAG
USB
Programmer
Programming
Options
Serial Flash
Internal
BRAM
Spartan-6 FPGA
SPI
I2C
UART
GPIO
MUX
* SPI only used.
Figure 3. Block Diagram of FPGA Hardware Design
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