
MAXQ Family User’s Guide:
MAXQ2010 Supplement
12-1
ADDENDUM TO SECTION 12: HARDWARE MULTIPLIER MODULE
The MAXQ2010 provides a hardware multiplier module that provides the following features (detailed in the MAXQ
Family User’s Guide):
• Completes a 16-bit x 16-bit multiply-accumulate or multiply-subtract operation in a single cycle
• Includes 48-bit accumulator
• Supports seven different multiplication operations
Unsigned 16-bit multiply
Unsigned 16-bit multiply and accumulate
Unsigned 16-bit multiply and subtract
Signed 16-bit multiply
Signed 16-bit multiply and negate
Signed 16-bit multiply and accumulate
Signed 16-bit multiply and subtract
12.1 Hardware Multiplier Control Registers
The associated registers for this module are listed in Table 12-1.
Table 12-1. Hardware Multiplier Control Registers
12.2 Hardware Multiplier Code Examples
12.2.1 Hardware Multiplier Example: Multiply and Square/Accumulate
move MCNT,#021h ; Unsigned multiply, no accumulate
move MA, #00155h
move MB, #000AAh ; MC[2:0] = 00_0000_E272h
move MCNT,#012h ; Square single operand and accumulate
move MA, #000FFh ; MC[2:0] = 00_0001_E073h
move MB, #00099h ; MC[2:0] = 00_0002_3BE4h
REGISTER ADDRESS FUNCTION
MCNT M2[00h] Multiplier Control Register. Controls the operation and mode selection for the multiplier.
MA M2[01h] Multiplier Operand A Register. Input register for the multiplier operations.
MB M2[02h] Multiplier Operand B Register. Input register for the multiplier operations.
MC2 M2[03h] Multiplier Accumulate Register 2. Contains bits 32 to 47 of the accumulator.
MC1 M2[04h] Multiplier Accumulate Register 1. Contains bits 16 to 31 of the accumulator.
MC0 M2[05h] Multiplier Accumulate Register 0. Contains bits 0 to 15 of the accumulator.
MC1R M2[08h] Multiplier Read Register 1. Contains bits 16 to 31 of the last multiply operation result.
MC0R M2[09h] Multiplier Read Register 0. Contains bits 0 to 15 of the last multiply operation result.
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