Maxim-integrated MAXQ7667 Uživatelský manuál stáhnout pdf (Strana 98)

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___________________________________________________________________________________________________________ 6-4

MAXQ7667 User’s Guide

The input and output conditioning in Figure 6-1 is deter

mined by the status/control registers T2CNAx (Type 2 timer/counter control reg-

ister A), T2CNBx (Type 2 timer/counter control register B), and T2CFGx (Type 2 timer configuration register). See Section 6.2: Type 2

Timer/Counter Peripheral Registers for a detailed discussion of these registers.

T2Vx REGISTER

16-BIT UP COUNTER

T2Rx REGISTER

16-BIT RELOAD

APTURE

EQUAL

OVERFLOW

RELOAD

CLOCK

2Cx REGISTER

6-BIT CAPTURE/COMPARE

OUTPUT CONDITIONING

POLARITY SELECTION

INPUT CONDITIONING

SCALING

GATING

Figure 6-1. Type 2 Timer/Counter in 16-Bit Mode

1 2 ... 93 94 95 96 97 98 99 100 101 102 103 ... 346 347

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